Sponsored projects
| Funding Agency | Topic | PI | Co-PI | Budget (INR) | Status |
|---|---|---|---|---|---|
| National Quantum Mission, Govt. oof India | Design and Demonstration of a Highly Scalable Quantum Computer using Semiconducting Qubits | IITD: A. Dixit, K. Paul, A. Jain, R. K. Palani, K. Saha IITR: A. Dasgupta, S. Dasgupta, V. S. Poonia, S. Kumar, D. Bhat IITK: Y. S. Chauhan, A. Lahgere IITRpr: N. Goyal, D. M. Das BITS Pilani: R. Yeleswarapu |
55 Cr | Ongoing | |
| QuInAS, UK | ULTRARAM memory | Avirup Dasgupta | - | undisclosed | Ongoing |
| Science and Engineering Research Board, Govt. of India | A Systematic Design of Robust Memory Cell Using Ferroelectric FET (FeFET) for AI Hardware Accelerator | Anand Bulusu | Avirup Dasgupta, Nitanshu Chauhan (IIT Bhilai) | 40.2 Lakhs | Ongoing |
| Semiconductor Research Corportaion (SRC) | Machine Learning augmented SPICE Models for Efficient Circuit Design | Avirup Dasgupta | Sourajeet Roy | 34.8 Lakhs | Ongoing |
| Berkeley Device Modeling Center (BDMC) | Compact modeling of advanced semiconductor devices | Avirup Dasgupta | -- | 92 Lakhs | Ongoing |
| Indian Institute of Technology Roorkee | Materials and devices for emerging anti-ferromagnetic memories | Tanmoy Pramanik | -- | 20 Lakhs | Completed |
| Indian Institute of Technology Roorkee (IPDF) | Analysis and Modeling of Ultra-thin Semiconductors for Future Technology Nodes | Avirup Dasgupta | -- | 21.9 Lakhs | Completed |
| Science and Engineering Research Board, Govt. of India | Development and Optimization of Magnetic Field Tolerant Spintronic Devices Targeted Toward Mobile and IOT Applications | Tanmoy Pramanik | -- | 31.5 Lakhs | Completed |
| Indian Institute of Technology Roorkee | Matching Grant: Variability Aware Compact Modeling of Nanosheet FETs | Avirup Dasgupta | -- | 9.5 Lakhs | Completed |
| Science and Engineering Research Board, Govt. of India | Variability Aware Compact Modeling of Nanosheet FETs | Avirup Dasgupta | -- | 31.6 Lakhs | Completed |
| Qualcomm India (Qualcomm Innovation Fellowship India 2021) | Fast Machine Learning Based Parametric SPICE Macromodel Extraction for FinFET Device-to-System Level Optimization | Sourajeet Roy | Sudeb Dasgupta | 10 Lakhs | Completed |
| Indian Institute of Technology Roorkee | Modeling and simulation of stacked Nanosheet FETs for upcoming technology nodes | Avirup Dasgupta | -- | 20 Lakhs | Completed |
Collaborations
Contact Us
Reach out to DiRac Lab
Location:
W-202/1,
Department of Electronics and Communication Engineering,
Indian Institute of Technology Roorkee
Email:
diraclab@ece.iitr.ac.in